I think that we’re talking past each other a bit here. I agree that the T4.1 only exposes two I2S ports. But, on that first I2S port, there are multiple data lines available. They can be used in parallel, not just as alternatives to each other.
This is how the existing I2SQuad class works, for example. Both AICs are on one I2S port. They both share the same three clock lines, but each AIC is provided its own RX and TX data lines.
As you noted, the NXP documentation is tricky here as many of these data lines can be used as either RX or as TX, or can even be substituted for each other. Also as you noted, yet another complication is trying to figure out which of these lines are broken out to pins on the T4.1.
According to the Teensy docs for the T4.1, here’s what I see.
In this table, you can see that sometimes pins are used as inputs and sometimes as outputs. In the end, they only appear to have exposed 5 data pins, which means that you can’t max out the system with 8-in / 8-out and, instead, you have to trade inputs and outputs to achieve your goal. Based on how they’ve carefully chosen to re-use the pins, there appear to be several options for us, but the most useful might be:
- 3 AICs for inputs and 2 AICs for output, which yields 6 audio inputs and 4 audio outputs
For this case, it looks like we’d use pins 8 (RX), 7 (TX), 6 (RX), 32 (TX) which is just like our normal “quad” setup…and then we’d send pin 9 to the 3rd AIC to provide the extra RX channels. The outputs of the 3rd AIC would be unused. We would then use
AudioInputI2SHex for our inputs and
AudioOutputI2SQuad for our outputs. We’d hope that they play nicely together.
Follow Up Note: Looking at the schematic for the Tympan RevE, I now see that Pin 9 is already used. It’s the reset pin for the Bluetooth module. So, if one wanted to use the Tympan’s bluetooth module along with the hack above, it wouldn’t work.